The electronics industry utilizes dielectric materials as insulating layers between circuits and components of integrated circuits (IC) and associated electronic devices. Line dimensions are being reduced in order to increase the speed and memory storage capability of microelectronic devices (e.g., computer chips). As the line dimensions decrease, the insulating requirements for the interlayer dielectric (ILD) become much more rigorous. Shrinking the spacing requires a lower dielectric constant to minimize the RC time constant, where R is the resistance of the conductive line and C is the capacitance of the insulating dielectric interlayer. C is inversely proportional to spacing and proportional to the dielectric constant (k) of the interlayer dielectric (ILD). Conventional silica (SiO2) CVD dielectric films produced from SiH4 or TEOS (Si(OCH2CH3)4, tetraethylorthosilicate) and 02 have a dielectric constant (k) of 4.0.
There are several ways in which industry has attempted to produce silicate-based CVD films with lower dielectric constants. One effective way to produce a lower dielectric constant film has been to dope a silicon oxide film with organic groups. The resultant film may have a dielectric constant that ranges from 2.7 to 3.5. These doped films, referred to herein as organosilicate “OSG”) films, are typically deposited as a dense film (density˜1.5 g/cm3) from an organosilicon precursor and an oxidant.
OSG films may be deposited by a chemical vapor deposition (CVD) process. In a typical CVD process, precursor gases are flowed into a reaction chamber, activated, and a material is deposited on a substrate inside the chamber. The activation of the precursors may occur by using an energy source such as, for example, a thermal or a RF-coupled plasma source. The chemical vapor deposition of an OSG material can be accomplished using a variety of precursors. Examples of commonly used precursors are organosilanes containing methyl groups such as mono-through tetramethylsilane, dimethyidimethoxysilane, diethoxymethylsilane, octamethylcyclotetrasiloxane, and/or tetramethylcyclotetrasiloxane. Plasma-enhanced chemical vapor deposition (PECVD) is the most commonly used CVD process to react methyl-containing organosilanes to form OSG materials. OSG films produced by PECVD processes typically contain from 10 to 40% atomic carbon and dielectric constants that range from 2.7 to 3.2, although lower dielectric constant values can be achieved if the film is made porous. As industry demands for films having dielectric constant values below 2.7 due to higher device densities and smaller dimensions have increased, the industry has turned to various porous materials for improved insulating properties.
The implementation of OSG materials as ILD's in IC's has hit several stumbling blocks. One major hurdle is the reduced mechanical properties of the OSG material over the traditional silica (SiO2). Mechanical properties of an ILD are typically reported by nanoindentation in gigapascals (GPa) as hardness (H) or Young's modulus. The hardness is a measure of the applied force required to indent the film whereas Young's modulus is the elastic response of the material to the applied force or compression. Silica has a hardness that may range from 8 to 10 GPa. By contrast, an OSG material has a hardness that may range from 0.1 to 5 GPa, depending on the dielectric constant and the process conditions at which the material was deposited. Mechanical strength is needed for subsequent processing steps such as etching, chemical mechanical planarization “CMP”) processing, and depositing additional layers such as diffusion barriers for copper, copper metal (“Cu”), and cap layers on the product. In some of these processes, temperature cycling of multiple layers may induce stresses due to the coefficient of thermal expansion mismatch between the different materials thereby causing cracking or delamination. Surface planarity is also required and may be maintained through controlling processing parameters such as those during the film formation process and through CMP. Mechanical integrity, stiffness, compressive, and shear strengths may be particularly important to survive CMP. These mechanical properties are also important in the packaging of the final product.
The amount of organic groups chemically incorporated into the material affects both the dielectric constant and the mechanical strength. Mechanical strength reduction observed for OSG films, when compared to a SiO2 film that does not contain organic groups, may be partially attributed to the disruption in the silica network by the introduction of terminal organic groups. One way of describing the network disruption is by using the ratio of the number of carbon atoms in the film (assuming the carbon is substantially present as methyl groups or as methylene species) to the number of silicon atoms in the film and which is referred to herein as the C/Si ratio. FIGS. 1 and 2 provide an illustration of the network for a silica film and an OSG film having a C/Si ratio of 0 and 1, respectively. It is believed that the more organic groups that are contained within the film, the less silicon sites are available for Si—O networking which may lower the corresponding hardness. However, if there are too few organic groups within the film, the dielectric constant may be adversely affected. For example, the benefit of adding organic groups to lower the dielectric constant diminishes with increasing amounts of organic groups within the film.
One way to reduce the C/Si ratio in the deposited film, and thus increase the hardness, is to vary the deposition process conditions. In general, higher energy conditions, such as higher temperatures and/or higher plasma powers, result in more Si—C bond cleavage during the CVD or PECVD reaction. However, there are cases when more energetic conditions cannot be employed because the distribution of certain desirable bonds, such as C—H or C—C, will be adversely affected. These highly energetic conditions may also make it more difficult to produce a porous OSG film.
Another process to reduce the C/Si ratio may be through post treatment, which may be thermal, plasma, and/or other treatments under a certain atmosphere such as, for example, O2. In certain instances, it may be undesirable to conduct a post-treatment step because it can add to the processing time of each wafer and potentially damage adjacent laminate layers within an integrated circuit.